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JimWang's Blog

Computer Architecture

This lecture is presented by Mingyu Gao in Fall 2023. Thanks to 唐添 for discussing with me. Introduction System Evaluation Metrics RISC-V ISA and Assembly RISC-V Encoding and Vector Extension Processor: Single-Cycle & Pipelined 10-24-2023 After discussing the structure of RISC-V instructions, it is time to consider how to build a RISC-V processor. ISA is a specification of functionality, and now we are going to build a processor to

Operating System and Distributed System

This lecture is presented by Wei Xu and Mingyu Gao in Fall 2023. Great thanks to 廖子豪 and 唐添 for taking this course and discussing with me and offer me a lunch in Tsinghua. Intro, Overview, Concurrency Review Virtual Memory and Paging File Systems and Transactions CPU Scheduling, Queuing, TCP Blockchains Time syncronization, Distributed Mutual Exclusion Multicast protocols, Distributed Transactions Distributed Consensus Protocols Distributed Storage, GFS Wide-area